Switched Capacitor Multilevel Inverter


Updated 7 months ago

Abstract

SWITCHED-CAPACITOR MULTILEVEL INVERTERThe Switched Capacitor Multilevel Inverter (SCMLI) is a transformative advancement in power conversion technology, addressing the limitations of conventional multilevel inverters. This innovation introduces a novel architecture that combines the benefits of switched capacitors with multilevel topology, resulting in enhanced voltage boosting, automatic voltage balancing, and improved power quality. The SCMLI operates by strategically activating switches and capacitors in a predefined sequence, generating multiple output voltage levels that surpass the input DC voltage. This unique approach eliminates the need for bulky transformers while reducing component count, complexity, and costs. The self-balancing mechanism ensures uniform voltage distribution across capacitors, enhancing reliability. The inverter's modular design accommodates various power levels and makes it an ideal candidate for renewable energy integration, grid connection, and industrial applications. Ultimately, the SCMLI presents a paradigm shift in power conversion, promising higher efficiency, improved voltage quality, and increased applicability in modern energy systems.

Information

Application ID 202331063951
Invention Field ELECTRICAL
Date of Application 2023-09-23
Publication Number 39/2023

Applicants

Name Address Country Nationality
Dr. Kasinath Jena Assistant Professor, Department of Electrical and Electronics Engineering, Arka Jain University Jamshedpur Jharkhand India 831013 India India
Dr. Dhananjay Kumar Assistant Professor,Electrical Engg. , Government Engineering College, Siwan Siwan Bihar India 841226 India India
Dr. Vishal Rathore Associate Professor, Electrical and Electronics BITS Bhopal Madhya Pradesh India 462045 India India
Dr. Deepak Verma Assistant professor, Electrical and Electronics Engg., Birla Institute of technology Mesra, Jaipur campus Jaipur Rajasthan India 302017 India India
Rishi Kesh Assistant Professor,Electrical Engg. , Government Engineering College Siwan Siwan Bihar India 841226 India India
Vinod Kumar Mehta Assistant Professor,Electrical Engineering Government Engineering College, Siwan Siwan Bihar India 841226 India India
Dr. Chinmoy Kumar Panigrahi Professor,School of Electrical Engineering, KIIT University Bhubaneswar Odisha India 841226 India India

Inventors

Name Address Country Nationality
Dr. Kasinath Jena Assistant Professor, Department of Electrical and Electronics Engineering, Arka Jain University Jamshedpur Jharkhand India 831013 India India
Dr. Dhananjay Kumar Assistant Professor,Electrical Engg. , Government Engineering College, Siwan Siwan Bihar India 841226 India India
Dr. Vishal Rathore Associate Professor, Electrical and Electronics BITS Bhopal Madhya Pradesh India 462045 India India
Dr. Deepak Verma Assistant professor, Electrical and Electronics Engg., Birla Institute of technology Mesra, Jaipur campus Jaipur Rajasthan India 302017 India India
Rishi Kesh Assistant Professor,Electrical Engg. , Government Engineering College Siwan Siwan Bihar India 841226 India India
Vinod Kumar Mehta Assistant Professor,Electrical Engineering Government Engineering College, Siwan Siwan Bihar India 841226 India India
Dr. Chinmoy Kumar Panigrahi Professor,School of Electrical Engineering, KIIT University Bhubaneswar Odisha India 841226 India India

Specification

Description:SWITCHED-CAPACITOR MULTILEVEL INVERTER
FIELD OF INVENTION
[0001] The present invention relates to the field of power electronics and renewable energy systems. More specifically, the invention pertains to multilevel inverter topologies for enhancing the voltage quality of electrical power generated from renewable energy sources such as solar and wind.
BACKGROUND OF THE INVENTION
[0002] The rapid expansion of industrialization and population growth has led to an increasing demand for energy resources, resulting in the consumption of conventional energy sources and the emission of greenhouse gases. As a response to these challenges, significant emphasis has been placed on exploring sustainable energy sources to mitigate the consumption of conventional resources and reduce environmental impact. Among various renewable energy resources, solar photovoltaic, wind, and fuel cells have gained prominence for generating electrical power. Solar and wind energy, in particular, have witnessed widespread adoption due to their availability, environmental benefits, and advancements in power electronics components.

[0003] However, one of the key challenges associated with renewable energy sources is the relatively low output power they generate. This limitation makes it challenging to meet the power quality requirements of applications such as electric vehicles, fuel cell vehicles, grid connections, and industrial processes. To address this issue, there is a need to enhance the output voltage of these energy sources, typically achieved through the use of transformers or boost converters. However, the application of transformers can lead to bulky and costly systems.

[0004] In the realm of power electronics, multilevel inverters have emerged as a vital solution for efficient power conversion. These inverters offer enhanced power quality, improved efficiency, and compatibility with low, medium, and high-power applications. Traditional multilevel inverter topologies include cascaded H-bridge, flying capacitor, and neutral point clamped inverters. Each of these topologies has its advantages and limitations. For example, while the cascaded H-bridge topology offers modularity, it requires isolated DC sources. The flying capacitor and neutral point clamped topologies involve clamping diodes and capacitors, leading to voltage balancing challenges.

[0005] In response to the limitations of conventional multilevel inverters, researchers have explored innovative topologies with fewer power electronic components that still achieve better voltage waveforms. One key consideration in such topologies is the ability to boost output voltage effectively. The concept of switched capacitors has gained attention due to its potential for significant voltage boosting, inherent capacitor voltage balancing, and increased levels of output voltage due to modularity. While previous topologies based on switched capacitors have shown promise, they often face challenges such as high voltage stress on semiconductor switches or complex configurations.

[0006] Thus, there exists a need for a novel multilevel inverter topology that overcomes the limitations of existing solutions. This topology should achieve substantial voltage boosting, ensure balanced capacitor voltages, reduce the number of switching components, and be suitable for a single-source configuration. The present invention addresses these challenges by introducing a switched capacitor-based multilevel inverter topology that significantly enhances voltage levels, capacitor voltage balance, and efficiency while minimizing the number of active switches. This invention contributes to the advancement of power electronics technology, enabling efficient conversion of renewable energy sources into high-quality electrical power.
SUMMARY OF THE INVENTION
[0007] In light of the requirements mentioned in the previous section, the following summary is provided to facilitate an understanding of some of the innovative features unique to the present invention and is not intended to be a full description. A full appreciation of the various aspects of the invention can be gained by taking the entire specification and drawings as a whole.
[0008] According to an embodiment of the present invention, a switched-capacitor multilevel inverter, comprising, one or more phase legs, each phase leg including, one or more power switches (SR1….SR6) configured to control current flow in the inverter circuit, a power diode configured to enable current flow in a single direction, on or more capacitors configured to store and release electrical energy during alternate modes of operation, an inductor, wherein the power switches, power diode, capacitors, and inductor are interconnected to form each phase leg, and the phase legs are structured to generate different output voltage levels.
[0009] The abovementioned embodiments and further variations of the proposed invention are discussed further in the detailed description.
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] FIG. 1 illustrates a Schematic diagram of the proposed three-phase SCMLI topology according to the embodiments of the present disclosure.
[0011] FIG. 2 (a-d) illustrates different mode of operation of the pole voltage according to the embodiments of the present disclosure.
DETAILED DESCRIPTION OF THE INVENTION
[0012] In the following description of the embodiments of the invention, reference is made to the accompanying drawings that form a part hereof, and which are shown by way of illustration of specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that changes may be made without departing from the scope of the present invention.
[0013] The specification may refer to “an”, “one” or “some” embodiment(s) in several locations. This does not necessarily imply that each such reference is to the same embodiment(s), or that the feature only applies to a single embodiment. Single feature of different embodiments may also be combined to provide other embodiments.
[0014] As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well unless expressly stated otherwise. It will be further understood that the terms “includes”, “comprises”, “including” and/or “comprising” when used in this specification, specify the presence of stated features, integers, steps, operations, elements and/or components, but do not preclude the presence or addition of one or more other features integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term “and/or” includes any and all combinations and arrangements of one or more of the associated listed items.
[0015] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that terms, such as those defined in commonly used dictionaries should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
[0016] The utility of the devices described herein will be explained further in detail in the following sections of this document referring to the figures. Specific terms used herein do not restrict the scope of the present disclosure.
[0017] Embodiments of the present invention disclose switched-capacitor multilevel inverter.
[0018] The invention centers around a novel switched capacitor-based multilevel inverter (SCMLI) topology, specifically designed to optimize voltage enhancement in renewable energy systems. Fig. 1 illustrates the structural layout of the proposed three-phase SCMLI topology. Each phase (R, Y, B) consists of six power switches (S_Xi), a power diode (DX), and two capacitors (C_X1 and C_X2), all interconnected to a single DC source.
[0019] According to an embodiment of the invention offers the unique ability to generate multiple voltage levels. In terms of pole voltage (V_RO), it can produce four distinct levels: 0, +V_DC, +2V_DC, and +3V_DC. When considering line-to-line voltage, the topology synthesizes a seven-level waveform across load terminals, encompassing levels of 0, ±1V_DC, ±2V_DC, and ±3V_DC. It's noteworthy that switches SX5 and SX6 are exceptions, as their peak inverse voltage (PIV) is equal to the input voltage source magnitude.
[0020] According to an embodiment of the invention switched capacitor-based multilevel inverter topology comprises several essential components that work in tandem to achieve enhanced voltage boosting, automatic voltage balancing, and efficient energy conversion. Each component plays a crucial role in the functionality of the topology, contributing to its unique features and advantages. Here is a list of the key components and their explanations:
[0021] Power Switches (S_Xi): These electronic devices are responsible for controlling the flow of current in the circuit. The topology features a total of six power switches in each phase leg, labeled as S_Ri, S_Yi, and S_Bi (i = 1 to 6), corresponding to the red (R), yellow (Y), and blue (B) phases, respectively. These switches are turned on and off in specific sequences to generate desired voltage levels and facilitate voltage boosting.
[0022] Power Diode (DX): The power diode serves as a one-way valve for current flow. In the proposed topology, one power diode is present in each phase leg (R, Y, B), allowing current to flow in only one direction and preventing reverse current flow.
[0023] Capacitors (C_X1, C_X2): Capacitors are energy storage devices that play a critical role in achieving voltage boosting and automatic voltage balancing. In each phase leg, there are two capacitors, labeled as C_R1, C_R2, C_Y1, C_Y2, C_B1, and C_B2, associated with the red, yellow, and blue phases, respectively. These capacitors store and release energy during various operational modes, contributing to the formation of output voltage levels and self-voltage balancing.
[0024] DC Source (V_DC): The DC source provides the necessary input voltage for the inverter. It can be connected to any renewable energy source or battery, serving as the foundation for generating multilevel output voltages.
[0025] Control Logic and Modulation Scheme: The control logic and modulation scheme determine the sequence of switch activations based on the desired output voltage level. This control mechanism ensures that the switches and capacitors are activated in specific patterns to achieve efficient voltage boosting and voltage balancing. The modulation scheme generates gating pulses for the power switches, enabling precise control over the output waveform.
[0026] Explanation of Operation
[0027] During operation, the power switches are activated according to specific sequences determined by the modulation scheme and control logic. The activation of switches allows the capacitors to charge and discharge in various configurations, resulting in the generation of different output voltage levels. By carefully selecting which switches to activate and when, the topology achieves voltage boosting by effectively combining the stored energy in the capacitors and the input voltage from the DC source. The voltage levels are modulated in a way that ensures smooth transitions and minimized voltage ripples.
[0028] The capacitors contribute to both voltage boosting and automatic voltage balancing. When switches are activated, the capacitors charge and discharge in series and parallel configurations, ensuring that their voltages are automatically balanced without the need for external balancing mechanisms. This inherent voltage balancing feature enhances the system's reliability and stability over time.
[0029] The operational modes of the proposed switched capacitor-based multilevel inverter (SCMLI) are essential for understanding how the topology generates different output voltage levels and achieves voltage boosting while ensuring automatic voltage balancing. These modes are the result of specific combinations of switch activations and capacitor configurations, enabling the generation of various voltage levels across the load terminals. The operation of a single-phase leg (e.g., red phase) can be explained in terms of these modes:
[0030] Mode I: Zero Output Voltage Generation
[0031] In this mode, two power switches are activated, specifically SR2 and SR6 for the red phase. This configuration results in the generation of a zero output voltage level across the load terminals. The capacitor CR1 is charged to the input voltage level (V_DC) due to the activation of SR2, effectively placing it in parallel with the DC source. The equivalent circuit during this mode shows the charging path of the capacitor and the current flow through the load terminals.
[0032] Mode II: Voltage Boosting to +1VDC
By activating SR2 and SR5, the inverter achieves a voltage level of +1VDC across the load terminals. Simultaneously, capacitor CR1 is charged to the magnitude of the DC source voltage (V_DC). This mode enables voltage boosting by effectively combining the charge on the capacitor with the input voltage. The equivalent circuit shows the arrangement that leads to this voltage level.
[0033] Mode III: Voltage Boosting to +2VDC
In this mode, the topology generates a voltage level equal to twice the input voltage magnitude (2VDC). The activation of SR1, SR4, and SR5 achieves this voltage level and charges capacitor CR2 to 2VDC. This mode further demonstrates the voltage boosting capability of the topology, where the capacitors store energy in configurations that result in elevated voltage levels.
[0034] Mode IV: Voltage Boosting to +3VDC
By activating switches SR3, SR4, and SR5, the proposed topology generates a voltage level of +3VDC across the load terminals. Both capacitors CR1 and CR2 are brought in series with the input voltage source, contributing to the generation of this higher output voltage level. This mode showcases the topology's ability to achieve significant voltage boosting.
[0035] Throughout these operational modes, the capacitors' charging and discharging paths are designed in a way that promotes automatic voltage balancing. By utilizing series and parallel connections between the capacitors and the input voltage source, the topology ensures that the voltages across the capacitors remain balanced without the need for additional voltage regulation mechanisms.
[0036] In summary, the operational modes of the switched capacitor-based multilevel inverter involve specific sequences of switch activations and capacitor configurations. These modes enable voltage boosting and automatic voltage balancing, allowing the topology to generate multiple output voltage levels for a variety of applications. The unique arrangement and control of components within each operational mode contribute to the topology's efficiency and effectiveness in power conversion and renewable energy integration.
[0037] The charging and discharging sequence in the proposed switched capacitor-based multilevel inverter (SCMLI) is a crucial aspect of its operation, contributing to both voltage boosting and automatic voltage balancing capabilities. Here's how the charging and discharging sequence works:
[0038] Charging Sequence:
[0039] Mode I (0V Output): In this mode, the switches corresponding to certain capacitors are activated in a specific pattern. For instance, in Mode I, switch SR2 is turned on. This connects capacitor CR1 in parallel with the input DC voltage source (V_DC). As a result, capacitor CR1 charges up to the magnitude of the input voltage source.
[0040] Mode II (+1V Output): In this mode, switch SR5 is turned on, which connects capacitors CR1 and CR2 in parallel with the input voltage source. This results in the charging of capacitor CR1 to V_DC and capacitor CR2 to 2 * V_DC.
[0041] Mode III (+2V Output): By activating switches SR1, SR4, and SR5, capacitor CR1 is placed in series with the input voltage source, resulting in a voltage of 2 * V_DC across the load terminals. Capacitor CR2 is charged to 2 * V_DC.
[0042] Mode IV (+3V Output): In this mode, both capacitors CR1 and CR2 are connected in series with the input voltage source. This arrangement leads to the generation of a voltage of 3 * V_DC across the load terminals.
[0043] Discharging Sequence:
[0044] The discharging sequence primarily occurs during the intervals when the capacitors are connected in series with the load. The discharge behavior depends on factors such as the type of load, the duration of discharging, and the power factor angle. The worst-case scenario is considered, where the load is entirely resistive.
[0045] Discharge of Capacitor CR1: When capacitor CR1 is connected in series with the load, it discharges through the load, and the voltage across it decreases. The extent of discharge is determined by the load current, the duration of discharging, and the power factor angle.
[0046] Discharge of Capacitor CR2: Similarly, when capacitor CR2 is connected in series with the load, it discharges through the load, leading to a decrease in voltage across it.
[0047] The charging and discharging sequences are orchestrated in a way that allows for the generation of multiple output voltage levels while maintaining the balance between the capacitors' voltages. This balance is essential for the effective operation of the SCMLI and ensures that the capacitors remain within their specified voltage limits.
[0048] The proposed switched capacitor-based multilevel inverter (SCMLI) presents several significant technical advantages over conventional multilevel inverters and existing SC-based topologies. These advantages contribute to its suitability for various applications, especially in renewable energy integration, power conversion, and voltage regulation:
[0049] Voltage Boosting Capability: One of the key advantages of the SCMLI is its inherent voltage boosting capability. By carefully configuring the activation of switches and capacitors in specific modes, the inverter can generate multiple output voltage levels that are higher than the input DC voltage. This feature eliminates the need for additional bulky transformers or complex voltage multiplication techniques, making the inverter more efficient and cost-effective.
[0050] Automatic Voltage Balancing: The SCMLI employs a sequence of charging and discharging cycles for its capacitors. This sequence not only generates the desired output voltage levels but also ensures automatic voltage balancing across the capacitors. As the capacitors are charged and discharged in a controlled manner, the voltage imbalances that are common in other multilevel inverters are mitigated. This self-balancing mechanism enhances the reliability and longevity of the inverter.
[0051] Reduced Component Count: Unlike some existing multilevel inverter topologies that require a higher number of switches and components, the SCMLI minimizes the switching component count while achieving multiple output voltage levels. This reduction in components simplifies the circuit design, reduces complexity, and lowers the overall system cost.
[0052] Improved Power Quality: The SCMLI generates output waveforms with multiple voltage levels, resulting in reduced harmonic distortion and improved power quality. This is particularly beneficial for applications that require high-quality AC power, such as grid-connected systems, industrial processes, and sensitive electronic devices.
[0053] Modular Structure: The proposed SCMLI topology is designed with modularity in mind. The arrangement of switches, capacitors, and diodes in a phase leg allows for easy replication across multiple phases, simplifying the scalability of the inverter for different power levels and applications.
[0054] Efficient Energy Conversion: By utilizing the switched capacitor concept, the inverter effectively transfers energy between the capacitors and the load, minimizing energy losses and improving overall efficiency. The ability to charge and discharge capacitors based on the load requirements optimizes energy utilization.
[0055] Enhanced Reliability: The inherent self-voltage balancing mechanism reduces stress on individual components, leading to improved reliability and extended lifespan. The reduced component count also contributes to higher reliability due to fewer points of failure.
[0056] Suitability for Renewable Energy Systems: The SCMLI's voltage boosting and voltage balancing capabilities make it well-suited for integrating renewable energy sources like solar panels and wind turbines. It can efficiently convert the low-voltage output from these sources into higher-voltage AC power for grid connection or local consumption.
[0057] Compact and Space-Efficient: Compared to conventional solutions that might require additional voltage multiplication stages or large transformers, the SCMLI's compact and integrated design saves space in various applications.
[0058] Examples described herein can also be used in various other scenarios and for various purposes. It may be noted that the above-described examples of the present solution are for the purpose of illustration only. Although the solution has been described in conjunction with a specific embodiment thereof, numerous modifications may be possible without materially departing from the instructions and advantages of the subject matter described herein. Other substitutions, modifications, and changes may be made without departing from the spirit of the present solution. All of the features disclosed in this specification (including any accompanying claims, abstract, and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any arrangement, except combinations where at least some of such features and/or steps are mutually exclusive.
[0059] The present description has been shown and described with reference to the foregoing examples. It is understood, however, that other forms, details, and examples can be made without departing from the spirit and scope of the present subject matter.

, Claims:CLAIMS:
1. A switched-capacitor multilevel inverter,comprising:
one or more phase legs, each phase leg including:
• one or more power switches (SR1….SR6) configured to control current flow in the inverter circuit;
• a power diode configured to enable current flow in a single direction;
• on or more capacitors configured to store and release electrical energy during alternate modes of operation;
• an inductor;
• wherein the power switches, power diode, capacitors, and inductor are interconnected to form each phase leg, and the phase legs are structured to generate different output voltage levels.

2. The multilevel inverter as claimed in claim 1, wherein during Operation Mode I:
the power switches SR2 and SR6 are activated, while the other switches remain deactivated;
a zero output voltage level is generated across the R and n terminals;
capacitor CR1 is charged to a magnitude equal to the input voltage source.

3. The multilevel inverter as claimed in claim 1, wherein during Operation Mode II:
The power switches SR2 and SR5 are activated, while the other switches remain deactivated;
An output voltage level equal to +1VDC is generated across the load terminals;
Capacitor CR1 is charged to a magnitude equal to the DC link source.

4. The multilevel inverter as claimed in claim 1, wherein during Operation Mode III:
the power switches SR1, SR4, and SR5 are activated, while the other switches remain deactivated;
An output voltage level equal to +2VDC is generated across the load terminals;
Capacitor CR1 is connected in series with the input voltage source, and capacitor CR2 is charged to 2VDC.

5. The multilevel inverter as claimed in claim 1, wherein during Operation Mode IV:
the power switches SR3 and SR5 are activated, while the other switches remain deactivated;
An output voltage level equal to +3VDC is generated across the load terminals;
Both capacitors CR1 and CR2 are brought in series with the input voltage source.

6. The multilevel inverter as claimed in claim 2, wherein:
in Operation Mode I, power switches SR2 and SR6 are activated, and capacitor CR1 is charged to VDC, causing a charging current to flow from the input voltage source to capacitor CR1.
in Operation Mode II, power switches SR2 and SR5 are activated, and capacitor CR1 is further charged to a magnitude equal to the DC link source voltage, causing a charging current to flow from the input voltage source to capacitor CR1.
in Operation Mode III, power switches SR1, SR4, and SR5 are activated, connecting capacitor CR1 in series with the input voltage source, and charging capacitor CR2 to 2VDC, causing a charging current to flow from the input voltage source to capacitors CR1 and CR2.
in Operation Mode IV, power switches SR3 and SR5 are activated, bringing both capacitors CR1 and CR2 in series with the input voltage source, and charging them to 3VDC, causing a charging current to flow from the input voltage source to capacitors CR1 and CR2.

Orders

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